The nand gate takes in two inputs.
4011 quad 2 input nand gate.
Pin 7 is the negative supply.
When both input a and input b are high the output will be not active.
Tayda electronics 4011 quad 2 input nand gate ic.
Unused inputs must be connected to vdd vss or another input.
Cd4011b cd4012b and cd4023b nand gates provide the system designer with direct implementation of the nand function and supplement the existing family of cmos gates.
The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.
Quad 2 input cd4011b dual 4 input cd4012b triple 3 input cd4023b data sheet acquired from harris semiconductor.
The 4011 quad nand gate chip can be obtained very cheaply from a number of online retailers for just a few cents.
One place it can be obtained from is tayda electronics at the following link.
Open in new find other nand gate description.
Pins 3 4 10 11 are gate outputs.
All inputs and outputs are buffered.
It operates over a recommended vdd power supply range of 3 v to 15 v referenced to vss usually ground.
Hef4011bt the hef4011b is a quad 2 input nand gate.
Part number order technology family.
Parametrics compare all products in nand gate email download to excel.
The 4011 is a member of the 4000 series cmos range and contains four independent nand gates each with two inputs.
Unused inputs must be connected to vdd vss or another input.
Ti alldatasheet datasheet datasheet search site for electronic components and semiconductors.
The hef4011b is a quad 2 input nand gate.
It operates over a recommended v dd power supply range of 3 v to 15 v referenced to v ss usually ground.
Because each gate has two inputs and it has 4 gates inside it s usually called a quad 2 input nand gate.
Quad 2 input cd4011b dual 4 input cd4012b triple 3 input cd4023b data sheet acquired from harris semiconductor.
Otherwise the output is low.
Cmos quad 2 input nand gate datasheet.
A quad 2 input nand gate using cmos technology and supplied in a 14 pin dil package.
Cmos nand gates cd4011 datasheet cd4011 circuit cd4011 data sheet.
It gives a low output only when all inputs are high.
The pinout diagram given on the right is the standard two input cmos logic gate ic layout.
The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.
The cd4011 is a cmos chip with four nand gates.
A nand gate combines the functionality of and and not gates.